Tenstorrent

Lead verification strategies for complex digital designs, develop reusable verification environments, and collaborate across teams to ensure design quality. | Proven expertise in verification techniques, SystemVerilog, UVM, and experience leading verification efforts for high-performance digital designs. | Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced Staff Level Design Verification Engineer to join our dynamic and innovative team. As a Staff Design Verification Engineer, you will play a critical role in ensuring the quality and reliability of our digital designs through comprehensive verification methodologies. The successful candidate will have a strong background in verification techniques, excellent problem-solving skills, and a passion for delivering high-quality designs. This job is hybrid, based out of Austin, TX or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are • Senior verification expert with a proven record of validating complex, high-performance digital designs from concept to silicon. • Strong command of UVM, SystemVerilog, and advanced verification methodologies, with a deep understanding of RTL design and system-level behavior. • Comfortable operating as a technical lead—guiding verification strategy, mentoring engineers, and driving closure across large-scale programs. • Highly analytical and hands-on, with strong communication skills and a drive to deliver silicon that works exactly as designed. What We Need • Define and lead verification strategies for major IP and subsystem blocks across AI and compute architectures. • Architect and maintain reusable, scalable UVM environments and verification infrastructure to support multi-site development. • Drive coverage convergence, debug complex design and performance issues, and ensure quality signoff ahead of tape-out. • Collaborate with design, architecture, and validation teams to improve design-for-verification practices and streamline bring-up cycles. What You’ll Learn • How Tenstorrent verifies cutting-edge, massively parallel compute architectures for next-generation AI workloads. • Advanced techniques for functional and formal verification at scale, using modern simulation and emulation platforms. • System-level debug workflows that span hardware, firmware, and compiler layers. • How architectural choices made early in design flow through to power, performance, and functional validation outcomes. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Lead the development of advanced die-to-die interconnect circuits for AI silicon, including architecture, feasibility analysis, and cross-disciplinary collaboration. | Over 10 years of experience in analog/mixed-signal IC design, expertise in high-speed PHYs, SerDes architectures, and proficiency with EDA tools. | Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly experienced Senior Analog/Mixed-Signal Architect to define and lead the development of advanced die-to-die interconnect circuits for our next-generation AI silicon. In this pivotal role, you'll architect high-speed analog/mixed-signal solutions, drive adoption of cutting-edge standards such as UCIe and BoW, and shape our technology roadmap for chiplet-based products. This role is hybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are • An experienced architect with a proven track record in analog/mixed-signal IC design, especially for high-speed, high-volume applications. • Deeply knowledgeable about die-to-die interconnect standards and PHYs (including UCIe and BoW), SerDes architectures, signal and power integrity. • Adept at technical leadership-mentoring both junior and senior engineers and fostering a culture of innovation. • Comfortable collaborating across digital, packaging, and system teams to deliver highly integrated, multi-die solutions. What We Need • 10+ years of experience architecting and implementing analog/mixed-signal circuits, with hands-on expertise in die-to-die PHYs. • Mastery of high-speed interface design (e.g., SerDes, NRZ, PAM4), clocking (PLLs, DLLs), and advanced PI/SI analysis. • Proficiency in EDA tools for analog/mixed-signal design, simulation, and layout (e.g., Cadence Virtuoso, Spectre, SPICE). • Strong communication skills and the ability to drive architectural definition, feasibility analysis, and cross-discipline integration. What You Will Learn • How to architect next-generation, chiplet-based die-to-die interconnects and advanced packaging solutions at the cutting edge of the industry. • Best practices for integrating analog/mixed-signal designs into complex, multi-die AI/ML accelerators. • Methods for guiding technology roadmaps and evaluating third-party IP versus internal development. • Strategies for hands-on silicon bring-up, debugging, and closing challenging signal/power integrity requirements. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Manage and improve people programs including compliance, benefits, leave of absence, and international expansion to scale HR processes efficiently. | 4+ years in People Programs or HR Operations, strong project management, communication skills, and preferably a bachelor's degree. | Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Sr. Program Manager, People Operations to take on a strategic and operational role at the heart of our People team. You’ll own high-impact programs across compliance, benefits, leave of absence, and international expansion, ensuring our People processes scale as quickly as the company does. If you love building efficient, scalable programs and driving meaningful employee experiences, this role is for you! This role is hybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Key Responsibilities Program Management • Drive evaluation and improvement of programs to ensure efficiency and alignment with business priorities. • Oversee employee training programs and initiatives. • Collaborate cross-functionally to scale People processes across regions. Compliance & Expansion • Own compliance deliverables, including relocation and remote work policies. • Maintain audit readiness and deliver successful reporting outcomes. • Guide international expansion by adapting People programs and processes for new markets. Benefits & Renewals • Lead benefits renewals for the US, Canada, Serbia, Japan, and India with vendors, ensuring offerings are competitive, compliant, and people-focused. • Recommend enhancements that improve the employee experience and support retention. Leave of Absence • Own the North America LOA strategy, ensuring policies are clear, compliant, and aligned with business needs. • Manage the vendor relationship to deliver a seamless employee experience. • Benchmark LOA policies against industry standards to recommend improvements. What You’ll Bring • 4+ years in People Programs or HR Operations • Excellent project management skills with the ability to own and drive processes Strong communication skills and a people-first mindset • A track record of building programs in fast-paced environments • Bachelor’s degree preferred What Makes You Stand Out • Ambition and a can-do attitude • Resourcefulness and creative problem-solving • A collaborative, team-first approach Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Lead and optimize end-to-end manufacturing lifecycle for custom silicon products, including overseeing foundry and OSAT operations, driving NPI to HVM ramp, and building quality and reliability teams. | 15+ years semiconductor manufacturing and operations experience, expertise in foundry and OSAT operations, advanced technology nodes, packaging and test engineering, supplier quality, failure analysis, and leadership skills. | Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced Silicon Product Manufacturing Operations Leader (Senior Director or VP) to lead and optimize the end-to-end manufacturing lifecycle for our custom silicon and semiconductor products. This position will work closely with the silicon architecture team to ensure our designs are optimized for mass production and supply chain teams to ensure our designs are optimized for cost, quality and yield.The ideal candidate will have deep expertise in semiconductor operations, strong leadership skills, and a proven ability to drive high-volume production from NPI to HVM. This role is hybrid, based out of Santa Clara, Austin, Fort Collins, or Toronto. Key Responsibilities • Product Understanding: Develop and maintain comprehensive knowledge of product IP, chiplets, and SoCs, with a focus on understanding mission-mode usage as well as customer needs. • Oversee manufacturing at foundry and OSAT, ensuring alignment with cost, quality, and yield targets. • Lead NPI to HVM ramp for multiple custom silicon generations, including advanced technology nodes (5nm, 4nm, 3nm, and beyond). • Establish and implement manufacturing process control strategies to optimize yield, improve reliability, and enhance efficiency. • Develop and maintain quality and reliability management systems, ensuring robust validation and compliance across all manufacturing stages. • Drive packaging and test strategies, overseeing product engineering efforts to improve cost efficiency and time to market. • Build and scale engineering operations teams, providing leadership in backend product engineering, failure analysis, and validation. • Collaborate with design, supply chain, and product teams to ensure seamless execution of manufacturing programs. • Work with supply chain to analyze and improve cost structures, optimizing supply chain efficiencies while maintaining quality and performance. • Develop long-term manufacturing strategies, ensuring scalability, innovation, and alignment with business objectives. • Build out a Quality and Reliability team: To conduct thorough investigations and analysis to identify root causes of systematic and random issues affecting quality and reliability, effectively addressing customer observations. • Build out Data Analysis: Analyze characterization and end-to-end manufacturing data from Wafer Acceptance Testing (WAT), sort, package, and system-level tests to uncover failure mechanisms, identify preventive actions, and address weaknesses in test strategies. • Test Condition Optimization: Ensure that optimal product test conditions are implemented to achieve maximum yield, quality, and performance while identifying test coverage gaps and initiating data-driven improvement plans. • Cross-Functional Collaboration: Maintain effective communication and collaborative relationships with product stakeholders, including Supply Chain team, Product Engineering and Test teams, Quality and Reliability teams, and IP/Chiplet/SoC design and platform debug leads. • Responsible for initial Silicon Bring-Up and debugging processes, providing critical feedback and recommendations for changes necessary to facilitate volume production. Qualifications & Experience • 15+ years of experience in semiconductor manufacturing, operations, and supply chain management. • Proven experience leading foundry and OSAT operations, including yield optimization, quality management, and cost control. • Expertise in high-volume silicon production, including advanced technology nodes with leading foundries (Samsung, TSMC, Intel, etc.). • Strong knowledge of packaging, test engineering, and backend product engineering. • Experience managing supplier quality engineering, contract manufacturing, and failure analysis labs. • Deep understanding of NPI to HVM transitions, product lifecycle management, and cross-functional collaboration. • Excellent leadership and team-building skills, with a track record of growing and mentoring high-performing teams. • Bachelor's or Master's degree in Electrical Engineering, Manufacturing Engineering, or a related field.

Lead physical design of CPUs and AI/ML chips from synthesis through tapeout collaborating with architecture and backend teams. | Experienced physical design engineer with hands-on semiconductor backend design skills and familiarity with industry tools and advanced nodes. | Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Lead the physical design of cutting-edge CPUs and AI/ML chips from synthesis through tapeout. In this role, you’ll own high-performance IP implementation and work closely with front-end, architecture, and backend teams to push power, performance, and area boundaries. This role is hybrid, based out of Santa Clara, CA; Austin, TX; or Fort Collins, CO. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are • An experienced physical design engineer with a background in SoC, CPU, GPU, or AI/ML implementations. • Confident managing backend execution from RTL handoff through signoff and tapeout. • Skilled in timing closure, floorplanning, and physical implementation techniques. • Comfortable writing scripts and debugging across design hierarchies. What We Need • Engineers with hands-on experience using Innovus, Primetime, RedHawk, and similar tools. • Deep understanding of PnR, timing analysis, area and power optimization, and ECO closure. • Ability to define physical design requirements and partner effectively with RTL and architecture teams. • Familiarity with low-power techniques and experience working at advanced technology nodes. What You Will Learn • The end-to-end physical implementation process for next-generation AI and CPU architectures. • How to run and evaluate experiments across RTL, synthesis, and layout to optimize for PPA. • How expert teams collaborate across RTL, verification, DFT, and software to deliver high-impact silicon. • Best practices for automating flows and solving challenges at deep sub-micron nodes. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government. Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.