Technical-Link N. America

Lead RTL design teams to develop and verify complex digital systems from concept to tape-out. | Bachelor’s or Master’s in Electrical/Computer Engineering, 8+ years RTL design experience, expertise in Verilog/SystemVerilog, and leadership in engineering teams. | Location: Remote ok, onsite would-be San Francisco airport area. Employment Type: Contract or full-time is acceptable About the Role We are seeking an experienced RTL Architecture Engineering Lead to drive the design, development, and verification of complex digital systems. This role will be responsible for defining architecture, leading RTL design teams, and ensuring the successful delivery of high-performance, low-power designs from concept to tape-out. Key Responsibilities • Define and develop micro-architecture specifications for digital systems and subsystems. • Lead RTL design activities, including coding, integration, and reviews. • Collaborate with system architects, verification engineers, and physical design teams to ensure design quality and performance. • Provide technical leadership and mentorship to a team of RTL engineers. • Drive architecture trade-off analysis to optimize performance, area, and power. • Interface with cross-functional teams to align design goals and project timelines. • Support verification, validation, and bring-up of designs in lab and production environments. Required Qualifications • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. • 8+ years of experience in RTL design and digital architecture. • Strong expertise in Verilog/SystemVerilog and RTL coding practices. • Solid understanding of computer architecture, memory hierarchy, and high-performance interconnects. • Experience with synthesis, static timing analysis (STA), and power analysis. • Hands-on experience with verification methodologies (UVM/OVM) and simulation tools. • Proven track record of leading engineering teams and driving projects to completion. Preferred Qualifications • Experience with low-power design techniques, clock-domain crossing (CDC), and DFT. • Familiarity with industry-standard protocols such as PCIe, DDR, HBM, Ethernet, or similar. • Knowledge of FPGA prototyping and emulation flows. • Excellent leadership, communication, and problem-solving skills.