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PC

P Chappel Associates Inc

via Lensa

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ASIC Design Engineers

Anywhere
full-time
Posted 9/11/2025
Key Skills:
ASIC Design
Verilog
VHDL
RTL Coding
Digital Design
Simulation Tools
Problem Solving
Communication

Compensation

Salary Range

$110K-140K a year

Responsibilities

Design and implement front-end ASIC architectures, collaborate with cross-functional teams, develop RTL code, optimize designs, and troubleshoot issues.

Requirements

Bachelor's or Master's degree in Electrical Engineering, 3+ years of ASIC design experience, proficiency in Verilog or VHDL, and strong problem-solving skills.

Full Description

Job Title: ASIC Design Engineer Company Overview: P Chappel Associates Inc is a leading international technology firm specializing in semiconductor design and innovation. With a strong presence worldwide, the company is expanding its US operations to foster cutting-edge developments in ASIC technology. Our Milpitas headquarters serves as a hub for collaboration among top industry talent. Role Overview: As a Front-End ASIC Design Engineer, you will play a critical role in the design and development of advanced ASIC solutions. You will collaborate with cross-functional teams to deliver high-quality, efficient designs that meet client specifications and industry standards. What You'll Do: - You will design and implement front-end ASIC architectures and modules. - You will collaborate with verification and back-end teams to ensure seamless integration. - You will develop RTL code and participate in code reviews to maintain quality. - You will analyze design specifications and translate them into functional hardware descriptions. - You will optimize designs for performance, power, and area. - You will troubleshoot and debug design issues throughout the development cycle. - You will contribute to documentation and design reports for internal and client use. - You will stay updated with the latest ASIC design methodologies and tools. What You Bring: - You have a Bachelor’s or Master’s degree in Electrical Engineering or related field. - You have 3+ years of experience in front-end ASIC design. - You are proficient in hardware description languages such as Verilog or VHDL. - You have strong knowledge of digital design principles and ASIC design flow. - You have experience with simulation and verification tools. - You possess excellent problem-solving and communication skills. Bonus Points If You Have: - Experience with low-power design techniques. - Familiarity with scripting languages like Python or TCL. - Knowledge of back-end design processes and tools. - Prior experience working in a fast-paced, international environment. What We Offer: - We offer competitive salary and comprehensive benefits package. - We offer opportunities for professional growth and career advancement. - We offer a collaborative and inclusive work environment. - We offer flexible work arrangements and support for work-life balance. - We offer access to the latest tools and technologies in ASIC design. Ready to Apply? Please submit your resume and cover letter through our careers page or email us directly at careers@pchappel.com. We look forward to discovering how you can contribute to our innovative team.

This job posting was last updated on 9/11/2025

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