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NVIDIA

NVIDIA

via Ladders

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Hardware Systems Architect – High-Speed I/O

Anywhere
full-time
Posted 8/28/2025
Verified Source
Key Skills:
HSIO protocols
PCI Express physical layer debugging
Signal integrity
Lab validation
Power management
Computer architecture
Timing analysis
System level hardware/software debugging

Compensation

Salary Range

$150K - 220K a year

Responsibilities

Lead HSIO subsystem optimization, verification, validation, and production readiness across multiple teams and time zones.

Requirements

Master's degree or equivalent, 10+ years in electrical engineering with deep HSIO and PCIe expertise, lab bring-up experience, and strong communication skills.

Full Description

Description: • Lead cross-domain optimization efforts with internal and external logic design, circuit design, board design, Simulation, diagnostics, firmware, driver, and marketing teams in different time zones, to ensure our products HSIO subsystem is specification compliant and tuned for optimal workload performance, and to drive the system into production. • Define and Drive our HSIO verification and validation of products from start to finish including test plan development, automation, requirements, resource planning, coverage metrics, test execution, bug resolution, and release to production. • Participate in reviewing board schematics, PCB layouts, and making design and component suggestions. • Ensure interoperability with connected devices and system components in sophisticated interconnect topologies. • Solve complex hardware and software HSIO issues at the system level on GPU accelerated computing platforms. Requirements: • Master's degree (or equivalent experience) in Electrical Engineering or related field • 10+ years of proven experience • Knowledge of HSIO protocols, specification, and operation at a system level • Understanding of HSIO power management • Excellent communication skills required to work well with multi-functional teams (software, firmware, marketing, etc.) • Strong EE fundamentals, knowledgeable in computer architecture, timing analysis, process variations, statistical error rates and power analysis • Lab Bring-Up or Lab Validation Experience • Demonstrable experience in PCI Express physical layer and debugging LTSSM failures; familiarity with data link layer and transaction layer. • In depth understanding of PCI Express (or similar) protocol and characterization/validation methods in post-silicon environment • Excellent knowledge of Signal integrity concepts, Silicon characteristics and high speed/SERDES functional validation • Experience with datacenter products including system management, security, networking, and storage. Benefits: • Equity • Benefits

This job posting was last updated on 9/4/2025

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