via Workday
$215K - 303K a year
Design and optimize emulation and FPGA validation strategies, lead validation initiatives, and collaborate across teams to enable next-generation SoC validation.
Minimum 10+ years in SoC design validation, strong background in emulation platforms, and proficiency in C/C++, Linux/UNIX environments.
Job Details: Job Description: Join our cutting-edge validation team and drive the future of emulation technologies for next-generation SoCs and systems. As a technical leader, you will architect and implement advanced Emulation/FPGA methodologies that accelerate functional validation and enable full-system integration. Key Responsibilities Architect Innovative Solutions: Design and optimize state-of-the-art emulation and FPGA strategies for functional validation, including Full System and In-Circuit Emulation (ICE) using Cadence Palladium and/or Synopsys Zebu. Lead Shift-Left Initiatives: Champion early validation methodologies to reduce time-to-market, ensuring robust readiness and scalability across projects. Cross-Functional Collaboration: Partner with pre-silicon, post-silicon, platform validation, and customer co-validation teams to deliver seamless integration and maximize emulation efficiency. Strategic Validation Leadership: Drive test-plan reviews, define emulation validation strategies, and create high-quality collateral to support comprehensive system-level validation. Enable Next-Gen Platforms: Influence architecture decisions and validation flows that shape the future of complex SoC and system designs. Additional Skills Excellent problem-solving skills and a self starter Good communication and project management skills Ability to work effectively in a cross-site team environment Qualifications: Minimum Qualifications Bachelors Degree in Computer Engineering or Computer Science or Electrical Engineering with 10+ years of experience 8+ years of experience in SoC design for In-Circuit Emulation or FPGA Strong background in validation functional and debug collaterals (transactors, trackers/checkers/monitors, coverage, test stimulus Hands-on experience with pre-silicon and post-silicon validation environments. Experience in emulation flow, debug methodologies, or testbench development Experience in commercial emulation platforms Preferred Qualifications Working knowledge with PCIE Gen6 speed-bridges and memory technologies (DDR, LPDDR) Strong software programming skills, proficient in C and/or C++, familiar with Linux/UNIX based development environments, tools, and script languages such as Perl, TCL/TK, and good software engineering practices Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 Annual Salary Range for jobs which could be performed in the US: $214,730.00-303,140.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. Intel’s official careers website. Find your next job and take on projects that shape tomorrow’s technology. Benefits Internships Life at Intel Locations Recruitment Process Discover your place in our world-changing work.
This job posting was last updated on 12/12/2025