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Code Metal

Code Metal

via Workable

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Senior Engineer - Hardware Modeling

Anywhere
full-time
Posted 8/19/2025
Direct Apply
Key Skills:
SystemC Modeling
Simulation
EDA Tools
AI Pipelines
Hardware Design
Verilog
VHDL
Formal Verification

Compensation

Salary Range

$Not specified

Responsibilities

Collaborate with AI and software engineers to build AI pipelines that generate and refine hardware models. Integrate AI-driven modeling pipelines with industry-standard EDA tools for simulation, emulation, and synthesis.

Requirements

Candidates should have a Master's or PhD in a relevant field and 5+ years of industry experience with SystemC modeling. A deep understanding of modeling tradeoffs and hands-on experience with relevant tools is essential.

Full Description

About Code Metal Code Metal is building the future of code transformation. Our platform enables seamless source-to-source transpilation, helping teams translate and optimize software across programming languages and domains. By combining deep expertise in compilers with modern AI-driven pipelines, we are unlocking powerful new ways to accelerate hardware and software development. We are now looking for a Senior Engineer – Hardware Modeling to help expand our core product into the world of AI-assisted hardware design and SystemC modeling. This is a unique opportunity to shape how advanced AI workflows integrate with EDA tools and chip design processes. What you’ll do Collaborate with AI and software engineers to build agentic AI pipelines that generate and refine hardware models, from blocks to full SoCs. Assess the quality and attributes of SystemC models, including simulation speed, precision and synthesizability. Integrate AI-driven modeling pipelines with industry-standard EDA tools for simulation, emulation and synthesis. Master’s or PhD in Computer Science, Electrical/Computer Engineering, or related field (or equivalent experience). 5+ years industry experience with SystemC modeling and simulation across block and SoC levels. Deep understanding of modeling tradeoffs at various abstraction levels (analytical, TLM, cycle-accurate). Hands-on experience with Synopsys, Cadence or Siemens tools for modeling, HLS and simulation. Knowledge of Verilog or VHDL. (Bonus) Experience with Formal Verification techniques. Work on cutting-edge AI applications in chip design and modeling. Join a highly technical, collaborative team solving real industry challenges. 100% remote-friendly within the US. 100 % Paid comprehensive health, dental and vision coverage. 401K with 5% Match Unlimited PTO and flexible, supportive work culture If you’re passionate about hardware modeling and want to be at the forefront of how AI is transforming EDA and chip design, we’d love to hear from you.

This job posting was last updated on 8/20/2025

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