Saicon

Design and layout of analog/mixed-signal integrated circuits focusing on deep sub-micron CMOS and FinFET technologies. | 5+ years of analog/mixed-signal layout design experience, 2+ years with FinFET, strong communication skills, and familiarity with CAD tools. | Location: Cupertino, CA (need to be onsite for the first 2 weeks and then remote) # Duration: 12 months Job Title: Mask Layout Designer III Qualification • 5+ years of experience in analog/mixed-signal layout design, with a focus on deep sub-micron CMOS circuits and at least 2+ years in FinFET technologies • Excellent communication skills and able to work with multi-functional teams • Familiar with CAD tools like Virtuoso, Innovus, Calibre is a plus • Programming knowledge in SKILL, Perl, and/or Python is a bonus • Concentration in Mixed-Signal and RF Integrated Circuits is helpful